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2024

Book

Distributed Ledger Technology: 7th International Symposium, SDLT 2023, Brisbane, QLD, Australia, November 30 – December 1, 2023, Revised Selected Papers

Naipeng Dong, Babu Pillai, Guangdong Bai and Mark Utting eds. (2024). Distributed Ledger Technology: 7th International Symposium, SDLT 2023, Brisbane, QLD, Australia, November 30 – December 1, 2023, Revised Selected Papers. Communications in Computer and Information Science, Heidelberg, Germany: Springer. doi: 10.1007/978-981-97-0006-6

Distributed Ledger Technology: 7th International Symposium, SDLT 2023, Brisbane, QLD, Australia, November 30 – December 1, 2023, Revised Selected Papers

2007

Book

Practical model-based testing

Utting, Mark and Legeard, Bruno (2007). Practical model-based testing. Amsterdam, Netherlands: Elsevier. doi: 10.1016/b978-0-12-372501-1.x5000-5

Practical model-based testing

2006

Book

Practical model-based testing: A tools approach

Utting, Mark and Legeard, Bruno (2006). Practical model-based testing: A tools approach. Elsevier. doi: 10.1016/B978-0-12-372501-1.X5000-5

Practical model-based testing: A tools approach

1994

Book

Pipeline specification of a MIPS R3000 CPU

Utting, Mark and Kearney, Peter (1994). Pipeline specification of a MIPS R3000 CPU. SVRC Technical Report, 92-6. Software Verification Research Centre, Department of Computer Science, The University of Queensland.

Pipeline specification of a MIPS R3000 CPU

1994

Book

Real time behaviour of a RISC processor: specification and computer-aided verification

Kearney, Peter, Utting, Mark and Whitwell, Keith (1994). Real time behaviour of a RISC processor: specification and computer-aided verification. SVRC Technical Report, 92-10. Software Verification Research Centre, Department of Computer Science, The University of Queensland.

Real time behaviour of a RISC processor: specification and computer-aided verification

1992

Book

Specification issues for real-time behaviour of RISC processors

Utting, Mark and Kearney, Peter (1992). Specification issues for real-time behaviour of RISC processors. SVRC Technical Report, 92-5. Software Verification Research Centre, Department of Computer Science, The University of Queensland.

Specification issues for real-time behaviour of RISC processors