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2019

Conference Publication

Evaluation of a novel multiple point set registration algorithm

Williams, J.A. and Bennamoun, M. (2019). Evaluation of a novel multiple point set registration algorithm. 15th International Conference on Pattern Recognition (ICPR2000), Barcelona, Spain, 3-7 September 2000 . Washington, DC, United States: IEEE Computer Society. doi: 10.1109/icpr.2000.905641

Evaluation of a novel multiple point set registration algorithm

2019

Conference Publication

Multiple view surface registration with error modeling and analysis

Williams, J. and Bennamoun, M. (2019). Multiple view surface registration with error modeling and analysis. 2000 International Conference on Image Processing, Vancouver, BC, Canada, 10-13 September 2000. Piscataway, NJ, United States: Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/icip.2000.901016

Multiple view surface registration with error modeling and analysis

2019

Conference Publication

Criminal justice responses to child exploitation material offending: a systematic review and evidence and gap map

Eggins, Elizabeth, Mazerolle, Lorraine, Higginson, Angela, Hine, Lorelei, Walsh, Kerryann, Sydes, Michelle, McEwan, James, Hassall, Georgia, Roetman, Scott, Wallis, Rebecca and Williams, John (2019). Criminal justice responses to child exploitation material offending: a systematic review and evidence and gap map. American Society of Criminology Conference, San Francisco, CA United States, November 2019.

Criminal justice responses to child exploitation material offending: a systematic review and evidence and gap map

2011

Conference Publication

A unified emulation/simulation environment for reconfigurable system-on-chip development

Crosthwaite, Peter, Williams, John and Sutton, Peter (2011). A unified emulation/simulation environment for reconfigurable system-on-chip development. 2011 International Conference on Field-Programmable Technology, New Dehli, India, 12-14 December 2011. Piscataway, NJ, United States: IEEE. doi: 10.1109/FPT.2011.6132690

A unified emulation/simulation environment for reconfigurable system-on-chip development

2009

Conference Publication

Profile driven data-dependency analysis for improved high level language hardware synthesis

Crosthwaite, Peter, Williams, John and Sutton, Peter (2009). Profile driven data-dependency analysis for improved high level language hardware synthesis. 2009 International Conference on Field-Programmable Technology, Sydney , Australia, 9-11 December 2009. Piscataway NJ USA: IEEE. doi: 10.1109/FPT.2009.5377672

Profile driven data-dependency analysis for improved high level language hardware synthesis

2009

Conference Publication

Design exploration for FPGA-based multiprocessor architecture: JPEG encoding case study

Wu, Jason, Williams, John, Bergmann, Neil and Sutton, Peter (2009). Design exploration for FPGA-based multiprocessor architecture: JPEG encoding case study. 17th IEEE Symposium on Field Programmable Custom Computing Machines, Napa, California, 5-7 April 2009. Piscataway NJ United States: IEEE. doi: 10.1109/FCCM.2009.7

Design exploration for FPGA-based multiprocessor architecture: JPEG encoding case study

2008

Conference Publication

An ILP formulation for architectural syntesis and application mapping on FPGA-Based hybrid multi-processor SoC

Wu, J., Williams, J.A. and Bergmann, N.W. (2008). An ILP formulation for architectural syntesis and application mapping on FPGA-Based hybrid multi-processor SoC. 2008 International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, 8-10 September, 2008. Heidelberg Germany: IEEE. doi: 10.1109/FPL.2008.4629981

An ILP formulation for architectural syntesis and application mapping on FPGA-Based hybrid multi-processor SoC

2008

Conference Publication

System level design methodology for Hybrid Multi-Processor SoC on FPGA

Wu, J., Williams, J. and Bergmann, N.W. (2008). System level design methodology for Hybrid Multi-Processor SoC on FPGA. The Sixteenth IEEE Symposium on Field-Programmable Custom Computing Machines, Stanford, USA, 14-15 April, 2008. Los Alamatis, California: IEEE. doi: 10.1109/FCCM.2008.45

System level design methodology for Hybrid Multi-Processor SoC on FPGA

2007

Conference Publication

Asymmetric multi-processor architecture for reconfigurable system-on-chip and operating system abstractions

Xie, Xin, Williams, John and Bergmann, Neil (2007). Asymmetric multi-processor architecture for reconfigurable system-on-chip and operating system abstractions. International Conference on Field Programmable Technology, ICFPT 2007, , , December 12, 2007-December 14, 2007. doi: 10.1109/FPT.2007.4439230

Asymmetric multi-processor architecture for reconfigurable system-on-chip and operating system abstractions

2007

Conference Publication

Asymmetric multi-processor architecture for reconfigurable system-on-chip and operating system abstracions

Xie, X., Williams, J. and Bergmann, N.W. (2007). Asymmetric multi-processor architecture for reconfigurable system-on-chip and operating system abstracions. 2007 International Conference on Field Programmable Technology (ICFPT 2007), Kitakyushu, Japan, 12-14 December, 2007. Piscataway, NJ, USA: IEEE.

Asymmetric multi-processor architecture for reconfigurable system-on-chip and operating system abstracions

2007

Conference Publication

Automatic self-reconfiguration of system-on-chip peripherals

Bergmann, N.W., Lu, Y. and Williams, J. (2007). Automatic self-reconfiguration of system-on-chip peripherals. 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007), California, USA, 23-25 April, 2007. Piscataway, NJ, USA: IEEE. doi: 10.1109/FCCM.2007.32

Automatic self-reconfiguration of system-on-chip peripherals

2007

Conference Publication

A Hybrid Reconfigurable Cluster-on-Chip Architecture with Message Passing Interface for Image Processing Applications

Syed, Irfan, Williams, John A. and Bergmann, Neil W. (2007). A Hybrid Reconfigurable Cluster-on-Chip Architecture with Message Passing Interface for Image Processing Applications. 2007 International Conference on Field Programmable Logic and Applications (FPL 2007), Amsterdam, The Netherlands, 27 - 29 August, 2007. Piscataway, NJ, USA: IEEE. doi: 10.1109/FPL.2007.4380728

A Hybrid Reconfigurable Cluster-on-Chip Architecture with Message Passing Interface for Image Processing Applications

2006

Conference Publication

VPN acceleration using reconfigurable system-on-chip technology

Wee, C. M., Sutton, P R, Bergmann, N W and Williams, J A (2006). VPN acceleration using reconfigurable system-on-chip technology. 14th Annual IEEE Symposim on Field-Programmable Custom Computing Machines, Napa, California, 24-26 April, 2006. USA: IEEE. doi: 10.1109/FCCM.2006.72

VPN acceleration using reconfigurable system-on-chip technology

2006

Conference Publication

Dynamic loading of peripherals on reconfigurable system-on-chip

Lu, Y., Bergmann, N. W. and Williams, J. A. (2006). Dynamic loading of peripherals on reconfigurable system-on-chip. Microelectronics, MEMs and Nanotechnology, Brisbane, 11-14 December, 2005. USA: The International Society for Optical Engineering. doi: 10.1117/12.638222

Dynamic loading of peripherals on reconfigurable system-on-chip

2006

Conference Publication

Multi stream cipher architecture for reconfigurable system-on-chip

Wee, C. M., Sutton, P R, Bergmann, N W and Williams, J A (2006). Multi stream cipher architecture for reconfigurable system-on-chip. 2006 International Conference on Field Programmable Logic and Applications, Madrid, Spain, 28-30 August, 2006. Spain: IEEE Circuits and Systems Society. doi: 10.1109/FPL.2006.311310

Multi stream cipher architecture for reconfigurable system-on-chip

2006

Conference Publication

A reconfigurable cluster-on-chip architecture with MPI communication layer

Williams, J A, Azeezullah, S I, Wu, J. and Bergmann, N W (2006). A reconfigurable cluster-on-chip architecture with MPI communication layer. 14th Annual IEEE Symposim on Field-Programmable Custom Computing Machines, California, USA, 24-26 April, 2006. USA: IEEE. doi: 10.1109/FCCM.2006.14

A reconfigurable cluster-on-chip architecture with MPI communication layer

2006

Conference Publication

A real-time asymmetric multiprocessor-reconfigurable system-on-chip architecture

Xie, Xin, Williams, John A. and Bergmann, Neil W. (2006). A real-time asymmetric multiprocessor-reconfigurable system-on-chip architecture. Microelectronics, MEMs and Nanotechnology, Brisbane, Australia, 11-14 December, 2005. USA: The International Society for Optical Engineering. doi: 10.1117/12.638216

A real-time asymmetric multiprocessor-reconfigurable system-on-chip architecture

2005

Conference Publication

FIFO Communication Models in Operating Systems for Reconfigurable Computing

Williams, J. A., Bergmann, N. W. and Xie, X. (2005). FIFO Communication Models in Operating Systems for Reconfigurable Computing. 2005 IEEE Symposium on Field Programmable Custom Computing Machines (FCCM 05), Napa, California, United States, 17-20 April, 2005. Los Alamitos, CA, United States: IEEE Computing Society. doi: 10.1109/FCCM.2005.35

FIFO Communication Models in Operating Systems for Reconfigurable Computing

2005

Conference Publication

Robust Fundamental Matrix Determination without Correspondences

Lehmann, Stefan, Clarkson, I. Vaughan L., Bradley, Andrew P., Williams, John and Kootsookos, Peter J. (2005). Robust Fundamental Matrix Determination without Correspondences. APRS Workshop on Digital Image Computing (WDIC2005), Griffith University, Southbank, Brisbane Australia, 21 February, 2005. St Lucia, Qld.: The University of Queensland.

Robust Fundamental Matrix Determination without Correspondences

2004

Conference Publication

Egret: A platform for reconfigurable system-on-chip

Bergmann, N. W. and Williams, J. A. (2004). Egret: A platform for reconfigurable system-on-chip. The Microelectronics: Design, Technology and Packaging Conference, Perth, 10-12 December, 2003. Washington: The Society of Photo-Optical Instrumentation Engineers. doi: 10.1117/12.523331

Egret: A platform for reconfigurable system-on-chip